The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2004

Filed:

Mar. 07, 2002
Applicant:
Inventors:

Hiromu Shiomi, Suita, JP;

Tsunenobu Kimoto, Kyoto, JP;

Hiroyuki Matsunami, Yawata, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/10312 ; H01L 3/1072 ; H01L 2/904 ;
U.S. Cl.
CPC ...
H01L 3/10312 ; H01L 3/1072 ; H01L 2/904 ;
Abstract

A SiC wafer comprises a 4H polytype SiC substrate in which the crystal plane orientation is substantially &lcub;03-38&rcub;, and a buffer layer composed of SiC formed over this SiC substrate . The &lcub;03-38&rcub; plane forms an angle of approximately 35&deg; with respect to the <0001> axial direction in which micropipes and so forth extend, so micropipes and so forth are eliminated at the crystal sides, and do not go through to an active layer on the buffer layer . Lattice mismatching between the SiC substrate and the active layer is suppressed by the buffer layer . Furthermore, anisotropy in the electron mobility is low because a 4H polytype is used. Therefore, it is possible to obtain a SiC wafer and a SiC semiconductor device with which there is little anisotropy in the electron mobility, and strain caused by lattice mismatching can be lessened, as well as a method for manufacturing these.

Published as:
WO0118872A1; EP1215730A1; EP1215730A4; TW565630B; US6734461B1; JP3854508B2; EP1215730B1; DE60033829D1; EP1215730B9; DE60033829T2;

Find Patent Forward Citations

Shiomi, Hiromu. (2004). Sic wafer, sic semiconductor device, and production method of sic wafer (U.S. Patent No. 6734461). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6734461

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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