The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2004

Filed:

Dec. 18, 2002
Applicant:
Inventors:

Jiunn-Der Yang, Hsinchu, TW;

Chaucer Chnug, Hsin Chu, TW;

Yuan-Chang Huang, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/1331 ;
U.S. Cl.
CPC ...
H01L 2/1331 ;
Abstract

A method forming sidewall spacers on a semiconductor substrate without using the conventional plasma etching method is disclosed. In the method, a semiconductor substrate that has a gate structure formed on a top surface is first provided, followed by the deposition of a dielectric material layer on top of the semiconductor substrate. The substrate is then rotated to a rotational speed of at least 50 rpm, and an acid vapor is flown onto the substrate until the sidewall spacers are formed. The dielectric material layer for forming the sidewall spacers may be SiO , SiON or Si N . The acid vapor utilized may be formed from an acid of HF, H PO , H SO or HCl. In a preferred embodiment, the semiconductor substrate may be rotated to a rotational speed between about 100 rpm and about 150 rpm for a time period between about 10 sec. and about 20 sec.


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