The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2004
Filed:
Jul. 16, 2002
James Yong Meng Lee, Singapore, SG;
Ying Keung Leung, Hong Kong, HK;
Yelehanka Ramachandramurthy Pradeep, Singapore, SG;
Jia Zhen Zheng, Singapore, SG;
Lap Chan, San Franciso, CA (US);
Elgin Quek, Singapore, SG;
Ravi Sundaresan, San Jose, CA (US);
Yang Pan, Singapore, SG;
Chartered Semiconductor Manufacturing Ltd, Singapore, SG;
Abstract
A method for forming a gate dielectric having regions with different dielectric constants. A low-K dielectric layer is formed over a semiconductor structure. A dummy dielectric layer is formed over the low-K dielectric layer. The dummy dielectric layer and low-K dielectric layer are patterned to form an opening. The dummy dielectric layer is isontropically etched selectively to the low-K dielectric layer to form a stepped gate opening. A high-K dielectric layer is formed over the dummy dielectric and in the stepped gate opening. A gate electrode is formed on the high-K dielectric layer.