The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2004

Filed:

Sep. 07, 2000
Applicant:
Inventors:

Chih-Shun Chen, Taichung, TW;

Po-Hao Yuan, Taichung, TW;

Shih-Kuang Chiu, Taichung, TW;

Feng-Lung Chien, Taichung, TW;

Ke-Chuan Yang, Taichung, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C25D 5/02 ; C25D 7/12 ;
U.S. Cl.
CPC ...
C25D 5/02 ; C25D 7/12 ;
Abstract

A flip-chip bumping method is proposed for the fabrication of solder bumps on a semiconductor wafer for flip-chip application. The proposed flip-chip bumping method is intended for use on a semiconductor wafer predefined with a plurality of chip regions which are delimited from each other by a predefined cutting line and each of which is formed with a plurality of aluminum or copper based bond pads, and is characterized in the provision of a plating bus over and along the cutting line and connected to each bond pad. By means of this plating bus, the required UBM (Under Bump Metallization) fabrication and solder-bump fabrication can be both carried out through plating. Since plating process is considerably lower in cost than sputtering process and etching process, the proposed flip-chip bumping method can be more cost-effective to implement than prior art.


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