The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 06, 2004
Filed:
Dec. 11, 2002
Kuo-Nan Yang, Taipei, TW;
Yi-Ling Chan, Junan Jen Misoli, TW;
You-Lin Chu, Tai Zhong, TW;
Hou-Yu Chen, Kaoshiung, TW;
Fu-Liang Yang, Hsin-chu, TW;
Chenming Hu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A new type of partially-depleted SOI MOSFET is described in which a tunneling connection between the gate and the base is introduced. This is achieved by using a gate dielectric whose thickness is below its tunneling threshold. The gate pedestal is made somewhat longer than normal and a region near one end is implanted to be P+ (or N+ in a PMOS device). This allows holes (electrons for PMOS) to tunnel from gate to base. Since the hole current is self limiting, applied voltages greater than 0.7 volts may be used without incurring excessive leakage (as is the case with prior art DTMOS devices). A process for manufacturing the device is also described.