The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 26, 2003

Filed:

Oct. 30, 2000
Applicant:
Inventors:

Randy H. Y. Lo, Taipei, TW;

Tzong-Da Ho, Taichung, TW;

Chi-Chuan Wu, Taichung, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 ;
U.S. Cl.
CPC ...
H05K 7/02 ;
Abstract

A stacked multi-chip package structure with on-chip integration of passive component is proposed, which is characterized in the mounting of passive component on a remaining surface area of the underlying semiconductor chip that is unoccupied by the overlying semiconductor chip, so that the overall package construction can be made more compact in size. The proposed package structure comprises: a substrate; a first semiconductor chip mounted over the substrate; a second semiconductor chip mounted over the first semiconductor chip; and at least one passive component mounted beside the second semiconductor chip and over the first semiconductor chip. The first and second semiconductor chips can be mounted by means of adhesive layers or flip chip technology. The passive component can be electrically coupled to the semiconductor chips through the use of wire-bonding technology (WBT) or surface-mount technology (SMT).


Find Patent Forward Citations

Loading…