The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2003

Filed:

Mar. 28, 2001
Applicant:
Inventors:

Douglas Keil, Fremont, CA (US);

Eric Wagganer, Milpitas, CA (US);

Bryan A. Helmer, Fremont, CA (US);

Assignee:

Lam Research Corp., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23C 1/400 ; B44C 1/22 ; B23P 1/500 ; G01L 2/130 ;
U.S. Cl.
CPC ...
C23C 1/400 ; B44C 1/22 ; B23P 1/500 ; G01L 2/130 ;
Abstract

Methods for etching a trench into a dielectric layer are provided. One exemplary method controls an ion-to-neutral flux ratio during etching so as to achieve a neutral limited regime in an ion assisted etch mechanism where the neutral limited regime causes bottom rounding. The method includes modulating physical sputtering causing microtrenching to offset the bottom rounding so as to produce a substantially flat bottom trench profile. Some notable advantages of the discussed methods of etching a trench into a dielectric layer includes the ability to eliminate the intermediate etch stop layer. Elimination of the etch stop layer will decrease fabrication cost and process time. Additionally, the elimination of the intermediate stop layer will improve device performance.


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