The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2003
Filed:
Apr. 15, 1999
Hiroyuki Suzuki, Hitachinaka, JP;
Hiroyuki Shinada, Chofu, JP;
Atsuko Takafuji, Nerima-ku, JP;
Yasutsugu Usami, Hitachinaka, JP;
Shuji Sugiyama, Mito, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
The present invention is intended to highly fast, stably acquire highly accurate images from irradiated positions with an electron beam on a circuit pattern in the step of fabricating a semiconductor device including an insulating material or a mixture of an insulating material and a conductive material, without occurrence of any deviation in the irradiated position in the images to be comparatively inspected, automatically comparing the images with each other thereby inspecting defects of the circuit pattern without occurrence of errors, and feeding back the result to the conditions of fabricating the semiconductor device thereby increasing the reliability of the semiconductor device and reducing the defective percentage thereof. The dependence of the surface height of a workpiece on the corrected amount of deflection at a central portion of a workpiece stage is compared with that at the outer peripheral portion of the workpiece, to obtain a distortion amount inherent to the outer peripheral portion of the workpiece. The distortion amount is eliminated from an outer peripheral standard mark signal, to calculate the dependence of the height on the corrected amount of deflection at the outer peripheral portion, thereby obtaining the deflection correcting amount at the outer peripheral portion equivalent to that obtained at the central portion. Since a suitable deflection correcting table can be prepared only by using the outer peripheral standard mark, the deflection correcting table can be updated by repeating desired times calculation of the corrected amount of deflection at the outer peripheral portion while a wafer is left mounted. As a result, the deflection correcting table including the dependence of the surface height, which table is capable of keeping up with the drift of the electron beam or the like, can be accurately obtained without reducing the throughput.