The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2003
Filed:
Nov. 28, 2000
Applicant:
Inventors:
Thomas J. Licata, Mesa, AZ (US);
Joseph T. Hillman, Scottsdale, AZ (US);
Assignee:
Tokyo Electron Limited, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C23C 1/434 ; H01L 2/906 ; H01L 3/900 ; B05D 5/12 ;
U.S. Cl.
CPC ...
C23C 1/434 ; H01L 2/906 ; H01L 3/900 ; B05D 5/12 ;
Abstract
A method of forming diffusion barrier stacks on a dielectric for a dual damascene metal chip-level interconnect, and a diffusion barrier stack produced thereby. Alternating layers of a metal and an electrically resistive diffusion barrier are deposited on a dielectric substrate, with different layers having different thicknesses appropriate to their functions in the device. In an example of the present invention, alternating layers of tantalum and tantalum nitride are deposited on a dielectric substrate.