The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2002

Filed:

Jun. 28, 2001
Applicant:
Inventors:

Tatsuo Nakayama, Tokyo, JP;

Yuji Ando, Tokyo, JP;

Hironobu Miyamoto, Tokyo, JP;

Kazuaki Kunihiro, Tokyo, JP;

Yuji Takahashi, Tokyo, JP;

Kensuke Kasahara, Tokyo, JP;

Nobuyuki Hayama, Tokyo, JP;

Yasuo Ohno, Tokyo, JP;

Kouji Matsunaga, Tokyo, JP;

Masaaki Kuzuhara, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/980 ;
U.S. Cl.
CPC ...
H01L 2/980 ;
Abstract

A carrier travel layer is formed on the substrate of a semiconductor device with a buffer layer interposed, and a spacer layer and carrier supply layer are then formed on this carrier travel layer. On the carrier supply layer are provided a source electrode and a drain electrode, and a gate electrode is provided on an interposed Schottky layer. The carrier supply layer is composed of AlGaN and has tensile strain. The Schottky layer is composed of InGaN and has compressive strain. A negative piezoelectric charge is induced on the carrier supply layer side of the Schottky layer, and a positive piezoelectric charge is induced on the opposite side of the Schottky layer, whereby a sufficient Schottky barrier height is obtained and leakage current is suppressed.


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