Wire-bonded semiconductor device with improved wire arrangement scheme for minimizing abnormal wire sweep

Abstract

A wire-bonded semiconductor device with an improved wire-arrangement scheme is proposed, which can help minimize abnormal wire sweep during encapsulation process. Among the bonding wires on the semiconductor device, those located in corners would be mostly susceptible to abnormal wire sweep, particularly a high-loop bonding wire that is located in immediate adjacency to a low-loop bonding wire located in one corner of the wire-bonded semiconductor device. To solve this problem, the low-loop bonding wire that is located in immediate adjacency to the sweep-susceptible high-loop bonding wire is erected substantially to the same loop height as the high-loop bonding wire, so that it can serve as a shield to the sweep-susceptible high-loop bonding wire against the flow of injected resin during encapsulation process, thus preventing abnormal wire sweep. Alternatively, if a pair of low-loop bonding wires are located in immediate adjacency to the sweep-susceptible high-loop bonding wire and are bonded to a common double-wire bond pad, these two low-loop bonding wires are arranged in an intercrossed manner, which can also help reduce the impact of the injected resin on the sweep-susceptible high-loop bonding wire, thus preventing abnormal wire sweep. The prevention of abnormal wire sweep allows the finished semiconductor device to be more assured in quality and reliability.