The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2002

Filed:

Apr. 29, 1999
Applicant:
Inventors:

Tetsuya Fujisawa, Kawasaki, JP;

Mitsutaka Sato, Kawasaki, JP;

Seiichi Orimo, Kawasaki, JP;

Kazuhiko Mitobe, Niigata, JP;

Masaaki Seki, Kawasaki, JP;

Masaki Waki, Kagoshima, JP;

Toshio Hamano, Kawasaki, JP;

Katsuhiro Hayashida, Sasebo, JP;

Yoshitsugu Katoh, Kawasaki, JP;

Hiroshi Inoue, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/302 ; H01L 2/348 ; H01L 2/350 ; H01L 2/710 ; H01L 2/3495 ;
U.S. Cl.
CPC ...
H01L 2/302 ; H01L 2/348 ; H01L 2/350 ; H01L 2/710 ; H01L 2/3495 ;
Abstract

A semiconductor device includes a resin package in which a semiconductor chip is sealed, the resin package having a first surface and a second surface opposite to the first surface; a plurality of leads having inner lead parts connected to the semiconductor chip and outer lead parts extending outside the resin package, the outer lead parts being bent along the shape of the resin package so as to form first terminal parts on the second surface and second terminal parts on the first surface; connection means electrically connecting the semiconductor chip and the leads; and a positioning mechanism provided either on the leads or on the resin package, which positions the outer lead parts by engaging a part of the outer lead parts to the resin package. Further, at least one of the leads and/or connection means is cut so as to electrically disconnect the semiconductor chip and the one of the leads and/or connection elements.


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