The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2002
Filed:
Jan. 17, 2001
Joyce C. Liu, Hopewell Junction, NY (US);
James C. Brighten, Wappingers Falls, NY (US);
Jeffrey J. Brown, Fishkill, NY (US);
John Golz, Cold Spring, NY (US);
George A. Kaplita, Wappingers Falls, NY (US);
Rebecca Mih, Wappingers Falls, NY (US);
Senthil Srinivasan, Fishkill, NY (US);
Jin Jwang Wu, Hopewell junction, NY (US);
Teresa J. Wu, Poughkeepsie, NY (US);
Chienfan Yu, Highland MIlls, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for fabricating a dual gate structure, comprising providing a semiconductor substrate having a first device area and a second device area covered by a gate oxide layer and a polysilicon layer, forming a first hard mask over the polysilicon layer, said first hard mask being a material that is resistant to a first etching, but susceptible to a second etching forming a second hard mask over the first hard mask and the polysilicon layer, said second hard mask being a material that is resistant to a second etching, but susceptible to a first etching, patterning and etching said second hard mask with a first etch to form a gate pattern on a first device area, and patterning and etching said first hard mask with a second etch to transfer gate patterns on the first and second device areas.