The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2002

Filed:

Sep. 29, 1997
Applicant:
Inventors:

Nicholas F. Pasch, Pacifica, CA (US);

Nicholas K. Eib, San Jose, CA (US);

Colin D. Yates, San Jose, CA (US);

Shumay Dou, San Jose, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

The system and method performs optical proximity correction on an integrated circuit (IC) mask design by initially performing optical proximity correction on a library of cells that are used to create the IC. The pre-tested cells are imported onto a mask design. All cells are placed a minimum distance apart to ensure that no proximity effects will occur between elements fully integrated in different cells. A one-dimensional optical proximity correction technique is performed on the mask design by performing proximity correction only on those components, e.g., lines, that are not fully integrated within one cell.


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Pasch, Nicholas. (2002). System and method for performing optical proximity correction on the interface between optical proximity corrected cells (U.S. Patent No. 6425117). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6425117

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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