The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2002

Filed:

Mar. 10, 2000
Applicant:
Inventors:

Srikanteswara Dakshina-Murthy, Austin, TX (US);

Paul R. Besser, Austin, TX (US);

Jonathan B. Smith, Fremont, CA (US);

Eric M. Apelgren, Austin, TX (US);

Christian Zistl, Dresden, DE;

Jeremy I. Martin, Austin, TX (US);

Lie Larry Zhao, Austin, TX (US);

Nicholas J. Kepler, Saratoga, CA (US);

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract

The present invention is directed to a method of forming semiconductor devices. In one illustrative embodiment, the method comprises forming a layer of dielectric material, forming a hard mask layer above the layer of dielectric material, and forming an opening in the hard mask layer. The method further comprises forming a sidewall spacer in the opening in the hard mask layer that defines a reduced opening, forming an opening in the layer of dielectric material below the reduced opening, and forming a conductive interconnection in the opening in the dielectric layer.


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