The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2002
Filed:
Jan. 17, 2001
Wen-Ting Chu, Kaohsiung County, TW;
Di-Son Kuo, Hsinchu, TW;
Jake Yeh, Hsin-Chu, TW;
Chia-Da Hsieh, Tainan, TW;
Chuan-Li Chang, Hsin-Chu, TW;
Sheng-Wei Tsaur, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd, Hsin Chu, TW;
Abstract
Within a method for fabricating a split gate field effect transistor (FET) within a semiconductor integrated circuit microelectronic fabrication, there is employed a sacrificial self aligned spacer layer which defines a control gate electrode channel within the split gate field effect transistor (FET). The sacrificial self aligned spacer layer is employed as part of an ion implantation mask employed for forming a source/drain region adjoining the control gate electrode channel within the split gate field effect transistor (FET). The sacrificial self aligned spacer layer is stripped from over the control gate electrode channel prior to forming over the control gate electrode channel a control gate electrode within the split gate field effect transistor.