The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6383860 B1

PDF
Full Text
Expired
Date of Patent:
May. 07, 2002

Filed:

Jul. 20, 2001
Applicant:
Inventors:

Shigenobu Maeda, Hyogo, JP;

Yasuo Inoue, Hyogo, JP;

Hirotada Kuriyama, Hyogo, JP;

Shigeto Maegawa, Hyogo, JP;

Kyozo Kanamoto, Hyogo, JP;

Toshiaki Iwamatsu, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18242 ;
U.S. Cl.
CPC ...
H01L 2/18242 ;
Abstract

A first impurity diffusion layer forms one of source/drain regions and also forms a bit line. A first semiconductor layer, a channel semiconductor layer and a second semiconductor layer, which forms the other of source/drain regions and also forms a storage node, are disposed on the first impurity diffusion layer. A capacitor insulating film is disposed on a second conductive layer. A cell plate is disposed on a storage node with the capacitor insulating film therebetween. A capacitance of the bit line is reduced, and a dynamic random access memory thus constructed performs a high-speed operation.


Find Patent Forward Citations

Maeda, Shigenobu. (2002). Semiconductor device and method of manufacturing the same (U.S. Patent No. 6383860). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6383860

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