The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2002
Filed:
Dec. 05, 2000
Pao-Ho Yuan, Taichung, TW;
Ting-Ke Chai, Taichung, TW;
Lien-Chi Chan, Taichung, TW;
Jen-Yi Tsai, Chiayi, TW;
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Abstract
A flip-chip bumping technology is proposed, which provides a flip-chip bumping structure with dedicated test pads on semiconductor chip and method of fabricating the same. The proposed flip-chip bumping technology is characterized by the forming of a lined-array of electrically-conductive dual-pad blocks respectively over the internal I/O points of the semiconductor chip, each dual-pad block including a first pad and a second pad located beside and electrically connected to the first pad; and wherein the respective first and second pads of the dual-pad blocks-are alternately designated as bump pads and test pads. During testing procedure, the probing to the internal circuitry of the semiconductor chip is carried out through the test-pad portions of the dual-pad blocks, so that the probing needles would leave no scratches over the bumppad portions of the same. During subsequent bumping process, solder bumps are formed respectively over the bump-pad portions of the dual-pad blocks. Since the bump-pad portions of the dual-pad blocks would be left unscratched, it allows the solder bump attachment to be more assured in quality and reliability.