The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2002

Filed:

Jan. 20, 1999
Applicant:
Inventors:

Warren M. Farnworth, Nampa, ID (US);

Jennifer L. Folaron, Plano, TX (US);

Robert J. Folaron, Plano, TX (US);

John O. Jacobson, Boise, ID (US);

David R. Hembree, Boise, ID (US);

Jay C. Nelson, Dallas, TX (US);

Lelan D. Warren, Dallas, TX (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 3/102 ;
U.S. Cl.
CPC ...
G01R 3/102 ;
Abstract

A method for positioning a semiconductor die within a temporary package, including forming a representation of at least a portion of a semiconductor die, moving the semiconductor die to a location proximate a temporary package, and comparing the representation of the at least a portion of the semiconductor die to a representation of at least a portion of the temporary package. The compared representations are then used to define movement of a die moving assembly, in order to move the die to place the semiconductor die and the temporary package into a desired relationship to one another. A restraining device is then secured to the temporary package to retain the semiconductor die in the desired relationship to the temporary package.


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