The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 2002
Filed:
Aug. 07, 2000
Takashi Nihonmatsu, Nagano-ken, JP;
Seiichi Miyazaki, Nagano-ken, JP;
Masahiko Yoshida, Nagano-ken, JP;
Hideo Kudo, Tokyo, JP;
Tadahiro Kato, Fukushima-ken, JP;
Shin-Etsu Handotai Co., Ltd., Tokyo, JP;
Abstract
A method of processing a semiconductor wafer sliced from a monocrystalline ingot comprises at least the steps of chamfering, lapping, etching, mirror-polishing, and cleaning. In the etching step, alkali etching is first performed and then acid etching, preferably reaction-controlled acid etching, is performed. The etching amount of the alkali etching is greater than the etching amount of the acid etching. Alternatively, in the etching step, reaction-controlled acid etching is first performed and then diffusion-controlled acid etching is performed. The etching amount of the reaction-controlled acid etching is greater than the etching amount of the diffusion-controlled acid etching. The method can remove a mechanically formed damage layer, improve surface roughness, and efficiently decrease the depth of locally formed deep pits, while the flatness of the wafer attained through lapping is maintained, in order to produce a chemically etched wafer having a smooth and flat etched surface that hardly causes generation particles and contamination.