The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2002

Filed:

Jul. 16, 1998
Applicant:
Inventors:

David N. Cokely, Apalachin, NY (US);

Thomas M. Culnane, Lanesboro, PA (US);

Lisa J. Jimarez, Newark Valley, NY (US);

Miguel A. Jimarez, Newark Valley, NY (US);

Li Li, Endicott, NY (US);

Donald I. Mead, Montrose, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/3495 ; H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
U.S. Cl.
CPC ...
H01L 2/3495 ; H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
Abstract

Fixtures for attaching a semiconductor chip to a substrate. The semiconductor chip has an array of joining material bumps, such as C solder balls. The substrate has an array of conductive pads corresponding to the array of joining material bumps. In a first embodiment the fixture has a body having a first cavity for containing the semiconductor chip and a second cavity in communication with the first cavity for containing the substrate. Whereby the substrate is placed over the semiconductor chip with the conductive pads opposing and in contact with the joining material bumps, such that during reflow of the joining material bumps, the weight of the substrate acts against the joining material bumps and aids in the attachment of the semiconductor chip to the substrate to form electrical connections therebetween. In a second embodiment the fixture has a first plate having a first opening for disposal of the semiconductor chip therein, a second plate stacked below the first plate and having a thickness substantially equal to the thickness of the substrate, the second plate further having a second opening opposing the first opening for disposal of the substrate therein, and a third plate stacked below the second plate such that the substrate is flattened in the second opening under the weight of the first plate thereby aiding in the attachment of the joining material bumps to their corresponding conductive pads during solder reflow to form electrical connections therebetween. Methods for use of the fixtures is also provided.


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