The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2001

Filed:

Sep. 03, 1999
Applicant:
Inventors:

Barney M. Cohen, Santa Clara, CA (US);

Jingang Su, Sunnyvale, CA (US);

Kenny King-Tai Ngan, Fremont, CA (US);

Jr-Jyan Chen, Santa Clara, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1302 ; H01L 2/1461 ; H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/1302 ; H01L 2/1461 ; H01L 2/144 ;
Abstract

A method of cleaning a contact area of a semiconductor or metal region on a substrate of an electronic device. First, the contact area is cleaned by exposing the substrate to a plasma that includes fluorine-containing species. Second, the substrate is exposed to a second atmosphere that scavenges fluorine, preferably formed by plasma decomposition of a hydrogen-containing gas. The second atmosphere removes any fluorine residue remaining on the contact area and overcomes any need to include argon sputtering in the cleaning process. Another aspect of the invention is a method of depositing a refractory metal over a contact area of a semiconductor region on a substrate. The contact area is cleaned according to the two-step process of the preceding paragraph. Then a refractory metal is deposited over the contact area. The two-step cleaning process can reduce the electrical resistance between the refractory metal and the semiconductor region. Furthermore, if the substrate is annealed to interdiffuse atoms of the semiconductor material and the refractory metal, the two-step cleaning process can reduce the anneal temperature required to achieve a desired low electrical resistance.


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