The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
May. 31, 2000
Kuo-Chyuan Tzeng, Hsin-Chu, TW;
Tse-Liang Ying, Hsin-Chu, TW;
Wen-Chuan Chiang, Hsin-Chu, TW;
Ming-Hsiang Chiang, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd, Hsin Chu, TW;
Abstract
Within a method for forming a patterned layer there is first provided a topographic substrate. There is then formed conformally over the topographic substrate a blanket target layer formed of a target material, where the blanket target layer has a lower substantially horizontal portion, an upper substantially horizontal portion and an intermediate portion therebetween. There is then formed upon the lower substantially horizontal portion of the blanket target layer a first masking layer formed of a first masking material and formed upon the upper substantially horizontal portion of the blanket target layer a second masking layer formed of a second masking material. There is then etched, while employing an etch method having an enhanced sequential selectivity for the first masking material and the target material with respect to the second masking material, the first masking layer and the lower substantially horizontal portion of the blanket target layer to form a patterned target layer which leaves exposed a portion of the substrate beneath the lower horizontal portion of the blanket target layer while leaving unetched the upper substantially horizontal portion of the blanket target layer. The method is particularly useful for forming patterned capacitor plate layers.