The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2001
Filed:
Nov. 23, 1999
Teresa J. Wu, Poughkeepsie, NY (US);
Bomy A. Chen, Hopewell Junction, NY (US);
John W. Golz, Hopewell Junction, NY (US);
Charles W. Koburger, III, Essex Junction, VT (US);
Paul C. Parries, Wappingers Falls, NY (US);
Christopher J. Waskiewicz, Poughkeepsie, NY (US);
Jin Jwang Wu, Fairfax, VA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A pair of transistors sharing a common electrodes e.g. a bitline in a DRAM array, has a self-aligned contact to the bitline in which the transistor gate stack has only a poly layer with a nitride cover; the aperture for the bitline contact is time-etched to penetrate only between the gates and not reach the silicon substrate; exposed nitride shoulders of the gate are etched to expose the poly; the remainder of the interlayer dielectric is removed by a selective etch; the exposed poly is re-oxidized to protect the gates; and the aperture bottom is cleaned; so that the thick gate stack of a DRAM is dispensed with in order to improve uniformity of line width across the chip beyond what the DRAM technique can deliver.