The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2001
Filed:
Mar. 27, 2000
Yung I Yeh, Kaohsiung, TW;
Te Tsung Chao, Kaohsiung, TW;
Ya Ping Hung, Kaohsiung, TW;
Hui Chin Fang, Kaohsiung, TW;
Advanced Semiconductor Engineering, Inc., Kaoshiung, TW;
Abstract
A BGA package includes a chip with an array pad design disposed on the upper surface of a substrate. The chip has a plurality of bonding pads located about the periphery thereof, and the bonding pads of the chip are positioned in three rows, an inner row, a middle row, and an outer row along the sides of the chip. Only power supply pads and ground pads are designed to be located in the outer row of bonding pads, and all of the I/O pads are designed to be located in the middle row of the bonding pads and the inner row of the bonding pads. The outer row, middle row, and the inner row of the bonding pads are electrically connected to the substrate through three tiers of bonding wires with different loop height, respectively,