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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6281081 B1

PDFFull Text
Date of Patent:
Aug. 28, 2001

Filed:

Nov. 13, 1998

Method of preventing current leakage around a shallow trench isolation structure

Applicant:
Inventors:

Sun-Chieh Chien, Hsinchu, TW;

Chien-Li Kuo, Hsinchu Hsien, TW;

Tzung-Han Lee, Taipei, TW;

Wei-Wu Liao, Taipei Hsien, TW;

Assignee:

United Microelectronics Corp., Hsinchu, TW;

Attorney:

Hickman Coleman & Hughes, LLP

Primary Examiner:

John F Niebling

Assistant Examiner:

Josetta Jones

Int. Cl.
CPC ...
H01L 2/1336 ; H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/1336 ; H01L 2/176 ;
Abstract

An ion implantation method useful for fabricating shallow trench isolation structureimplants phosphorus ions instead of arsenic ions into a substrate when the source/drain regions of an NMOS device are doped. Alternatively, low energy ions are used in the ion implantation for forming the source/drain regions of an NMOS device. Consequently lattice dislocations of the crystal structure within a substrate is reduced and unwanted device leakage current is eliminated.

Find Patent Forward Citations

Chien, Sun-Chieh. (2001). Method of preventing current leakage around a shallow trench isolation structure (U.S. Patent No. 6281081). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6281081

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