The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2001
Filed:
Feb. 09, 1999
Applicant:
Inventors:
Pao-Kang Niu, Hsinchu, TW;
Chang-Sheng Lee, Taipei, TW;
Bih-Tiao Lin, Ping-Tung Hsien, TW;
Sen-Nan Lee, Hsinchu, TW;
Assignee:
Worldwide Semiconductor Manufacturing Corp., Hsinchu, TW;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1302 ;
U.S. Cl.
CPC ...
H01L 2/1302 ;
Abstract
A method for planarizing a semiconductor wafer. An insulation layer is formed over the wafer. A spin-on-glass layer is coated over the insulation layer. Subsequently, the spin-on-glass layer is baked to smooth out its upper surface. A chemical-mechanical polishing process is carried out to planarize the insulation layer. The method eliminates recess cavities in the more loosely packed device region of the insulation layer after a planarization process.