High efficiency color filter process for semiconductor array imaging devices

Abstract

A microelectronic method is described for optimizing the fabrication of optical and semiconductor array structures for high efficiency color image formation in solid-state cameras. Disclosed is an ordered fabrication sequence in which microlens formation precedes color filter layer formation to enable increased image light collection efficiency, to encapsulate and protect the microlens elements from chemical and thermal processing damage, to minimize topographical underlayer variations which would axially misalign or otherwise aberrate microlens elements formed on non-planar surfaces, and, to complete the most difficult steps early in the process to minimize rework and scrap. A CMOS, CID, or CCD optoelectronic configuration is formed by photolithographically patterning a planar-array of photodiodes on a Silicon or other III-V, II-VI, or compound semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, planarized, and, a first convex microlens array of high curvature or other suitable lenses are formed thereon. A transparent encapsulant is deposited to planarize the microlens layer and provide a spacer for the successive deposition(s) of one or more color filter layers. The microlens array may be formed from positive photoresists and the spacer from negative resist, with close attention to matching the index of refraction at layer interfaces. A final surface layer comprising a color filter completes the solid-state color image-forming device.