The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2001

Filed:

May. 12, 1999
Applicant:
Inventors:

Dror Hurwitz, Gilboa, IL;

Eva Igner, Haifa, IL;

Boris Yofis, Haifa, IL;

Dror Katz, Kiryat Tivon, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/3053 ;
U.S. Cl.
CPC ...
H01L 2/3053 ;
Abstract

A process for manufacturing an electronic interconnect structure, the process including the steps of depositing an adhesion metal layer over a dielectric material surface having at least one exposed aluminum surface; depositing a barrier metal layer over the adhesion metal layer; depositing a first layer of aluminum over the barrier metal layer; depositing an intermediate barrier metal layer over the first layer of aluminum; applying a photoresist layer on top of the intermediate barrier metal layer; exposing and developing the photoresist layer; removing the exposed barrier metal and photoresist layer, leaving a layer of barrier metal over the aluminum layer; converting those portions of the layer of aluminum which are not covered by barrier metal to a porous aluminum oxide by porous anodization; removing the porous aluminum oxide; and removing the exposed barrier metal and adhesion metal layers to leave exposed patterned aluminum, and an electronic interconnect structure manufactured by this method.


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