The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2001
Filed:
Jul. 16, 1999
Taiwan Semiconductor Manufacturing Company, Hsin-chu, TW;
Abstract
A method to prevent threshold shifts in MOS transistors due to auto-doping from heavily doped polysilicon layers. Isolation regions are provided in a semiconductor substrate separating active areas. A gate oxide layer is formed over the surface of the semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer. A tungsten silicide layer is deposited overlying the polysilicon layer. The tungsten silicide layer and the first polysilicon layer are etched to form MOS gates and bottom electrodes for dual polysilicon capacitors. An interpoly dielectric layer is deposited overlying entire surface of the semiconductor substrate. A doped polysilicon layer is deposited overlying the interpoly dielectric layer. A sealing oxide layer is deposited overlying the doped polysilicon layer to prevent out-diffusion of impurity ions into the semiconductor substrate and thereby preventing auto-doping. The tungsten silicide layer is annealed. Ions are implanted to form drain and source regions. The fabrication of the integrated circuit device is completed.