The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2001
Filed:
Aug. 03, 1999
Jennifer Fosberry, Santa Clara, CA (US);
Masud Beroz, Livermore, CA (US);
Mihalis Michael, Antioch, CA (US);
Philip Osborn, Mountain View, CA (US);
Tessera, Inc., San Jose, CA (US);
Abstract
A method of manufacturing a plurality of semiconductor chips packages and the resulting chip package assemblies. The method includes providing a circuitized substrate having terminals and leads. A spacer layer is deposited or attached to the substrate and each chip is then attached to the spacer layer. Typically, the spacer layer is comprised of a compliant or resilient material. The terminals and leads are interconnected using leads, at least some of which are fan-out leads. A ring-like pattern of a curable composition is disposed around each chip and cured to form a support structure. The assembly is encapsulated by dispensing a composition which is curable to an encapsulant into the gaps between the support structures and the chips. The encapsulant material is then cured thereby defining a composite of chip assemblies which may be singulated into individual chip packages.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile