The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2001

Filed:

Feb. 16, 1999
Applicant:
Inventors:

Hung-Yu Kou, Hsinchu Hsien, TW;

Chih-Ching Hsu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/13205 ;
U.S. Cl.
CPC ...
H01L 2/13205 ;
Abstract

The present invention is directed towards a method of fabricating a self-aligned silicide on gate electrode and source/drain region of a semiconductor device. A semiconductor substrate having gate oxide layer and polysilicon layer is provided. Next, a first silicide layer is formed on polysilicon layer. The substrate is patterned and then, etched to form a gate structure. A spacer is formed on the sidewall of the gate structure and source/drain region is formed adjacent thereto. A metal layer is covered on the surface of the substrate. The substrate is performed a thermal process to convert the portion of the metal layer on gate structure and source/drain region into self-aligned silicide.


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