The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2001
Filed:
Jun. 28, 1999
Kuo-Ching Huang, Kaohsiung, TW;
Tse-Liang Ying, Hsin-Chu, TW;
Wen-Chuan Chiang, Hsin-Chu, TW;
Min-Hsiung Chiang, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A method for forming a self aligned contact without key holes using a two step contact deposition. The process begins by providing a semiconductor structure having conductive structures (such as bit lines) thereover with sidewalls and having a contact area adjacent to the conductive structures. The conductive structures comprise at least one conductive layer with a hard mask thereover. A spacer layer is formed over the hard mask and the substrate structure and anisotropically etched to form sidewall spacers on the sidewalls of the conductive structure. A second dielectric (IPO) layer is formed over the sidewall spacers, the hard mask, and the substrate structure, whereby the second dielectric layer has a keyhole. A contact opening is formed in the second dielectric layer over the contact area. A first contact layer having poor step coverage is formed in the contact openings and over the second dielectric layer, thereby plugging the keyhole without filling it. A second contact layer is formed over the first contact layer.