The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2000

Filed:

Aug. 23, 1999
Applicant:
Inventors:

Ray J Beffa, Boise, ID (US);

William K Waller, Boise, ID (US);

Lee R Nevill, Boise, ID (US);

Warren M Farnworth, Nampa, ID (US);

Eugene H Cloud, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H / ; G11C / ;
U.S. Cl.
CPC ...
714-7 ; 714-8 ; 714769 ;
Abstract

An on-chip testing device separately locates must-repairs or preferred-repairs in a row direction and column direction of a memory array. A row counter and a column counter are operated to index the memory array in row-major order, and then in column-major order (or vice versa). A running total of the number of failures is kept for each row and column, when the running total equals or exceeds a predetermined value, the row or column is determined to be a must-repair or a preferred repair. Rows to be repaired are substituted with redundant memory rows and-columns-to be prepared are substituted with redundant memory columns.


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