Method of manufacture of stacked gate mos structure for multiple voltage

Abstract

This method forms a capacitor structure on a semiconductor substrate for providing split voltages for semiconductor circuits by the following steps. Form an active area in the substrate serving as a lower capacitor plate for a bottom capacitor and then form a thin dielectric layer and field oxide regions on the substrate, and cover the dielectric layer with a capacitor plate over the active area to complete the bottom capacitor. Form a thick dielectric layer over the device and a via through the thick dielectric layer to the upper capacitor plate. Form a second lower plate for a top capacitor. Form an inter-layer dielectric layer over the second lower plate. Form an upper capacitor layer over the inter-layer dielectric layer to form a top capacitor with a different capacitance value from the bottom capacitor. The value of the capacitance can be varied by selection of the permittivity and/or thickness of the dielectric layer and by variation of the effective plate area of the top and bottom capacitors.