The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2000
Filed:
Jan. 06, 1999
Hua-Shu Wu, Hsinchu, TW;
Chun-Hung Peng, Hsinchu, TW;
Abstract
A method for forming a plurality of self-aligned via holes applied to a semiconductor device is disclosed. The method includes steps of (a) providing a substrate forming thereon a conducting layer forming thereon a sacrificial layer; (b) partially removing the sacrificial layer while retaining a plurality of sacrificial via pillars, and removing portions of the conducting layer under the removed sacrificial layer; (c) forming a first insulating layer between the plurality of the sacrificial via pillars, and then planarizing the first insulating layer to expose tops of the plurality of sacrificial via pillars; and (d) removing the plurality of the sacrificial via pillars while retaining the first insulating layer to form the plurality of the self-aligned via holes. By the above-described method, the formed via holes are self-aligned to the underlying metal lines and pads and less photolithography equipment requirement is needed to define fine via holes.