The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 1999
Filed:
Sep. 12, 1997
Tzong-Sheng Chang, Chang-Hua, TW;
Yen-Shih Ho, Chai-Yi, TW;
Ruey-Hsin Liou, Miao-Li, TW;
Yuan-Cheng Yu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A method of forming a semiconductor device includes forming of layers of polysilicon and dielectric layers in manufacturing a semiconductor device and patterning the layers into devices using phototlithography and etching process steps. End point mode detection is used in the etching process in a way in which the area exposed during etching is increased to enhance the end point detection capacity, by adding a surplus pad area before pad formation. Specifically an EPROM device is formed with a first level of polysilicon above a gate oxide layer patterned into a floating gate electrode of an EPROM device. Then form an ONO layer above the floating gate electrode. Define array protection, grow a second gate oxide layer, deposit a second level of polysilicon, define peripheral gates from the second level of polysilicon, and define an EPROM transistor gate electrode from the second level of polysilicon.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile