The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 1999

Filed:

Mar. 26, 1998
Applicant:
Inventors:

Li-Huan Chu, Hsin-Chu, TW;

Wen-Chung Lee, San-Chong, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324769 ;
Abstract

This invention describes a method for improving the test time for hot carrier injection effects in CMOS transistors. In conventional testing of hot carrier effects a stress voltage is applied between the drain and the source of a transistor. This stress voltage is limited by the drain to source punch-through voltage. In the enhance method described within, a substrate back bias is applied that extends the punch-through voltage and allows a higher drain to source stress voltage. With the higher stress voltage the amount of time needed to test parameter degradation caused by hot carrier injection is substantially reduced.


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