The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 1999

Filed:

Dec. 30, 1996
Applicant:
Inventors:

Scott E Thompson, Portland, OR (US);

Chai-Hong Jan, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438308 ; 438765 ;
Abstract

A two step source/drain annealing process which permits a dopant to be ion implanted directly into the silicon without a protective oxide. The gate oxide is removed before the ion implantation of the dopant occurs, thus the dopant is implanted directly into bare silicon. In a first step of the annealing process, a thin oxide is grown over the source and drain regions at a relatively low temperature (e.g., 600.degree. C.) this temperature to prevent the evaporation of the dopant from the silicon substrate and polysilicon gate. The second step of the annealing process occurs at a higher temperature allowing the dopant to be driven into the substrate forming the source and drain regions.


Find Patent Forward Citations

Thompson, Scott. (1999). Two step source/drain anneal to prevent dopant evaporation (U.S. Patent No. 5874344). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5874344

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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