Physical design automation system and method using monotonically

Abstract

An initial placement of cells, and a routing including wires interconnecting the cells, is provided for a microelectronic integrated circuit. A grid is defined as including a plurality of first gridlines that extend parallel to a first axis, and a plurality of second gridlines that extend parallel to a second axis that is angularly displaced from the first axis. The cells are represented as vertices located at intersections of first and second gridlines, and the wires are represented as edges that extend along the first and second gridlines. Clusters of vertices are created such that each cluster includes vertices located on a respective first gridline. A 'cover' is computed as including a minimum block of clusters that are connected to all other clusters by wires extending along the second gridlines. Clusters outside the cover are spatially reordered along the second axis away from the cover in descending order of numbers of wires extending from the clusters along the second gridlines. The placement is then updated and rerouted, and these operations are performed in the opposite direction and the two perpendicular directions. A quality factor, preferably the total wirelength of the routing, is computed and compared to a previous value. The entire operation is iteratively performed until the improvement in quality factor between consecutive iterations becomes less than a predetermined value. Due to the nature of the reordering, the quality factor improves monotonically for each iteration. The rerouting steps can be omitted, and edges defined by bounding boxes constructed around interconnect nets.