The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1998
Filed:
Jan. 15, 1997
Applicant:
Inventors:
Jhon-Jhy Liaw, Taipei, TW;
Ding-Shan Wang, Hsin-Chu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438663 ; 438664 ;
Abstract
A process for fabricating MOSFET devices, for a SRAM cell, using a polycide contact structure, self-aligned to an underlying source and drain region, has been developed. This process features the use of a high temperature, rapid thermal anneal step, used to dissolve native oxide at the polycide-source and drain interface, thus reducing the resistance at the interface of the polycide self-aligned structure, and the underlying source and drain area.
Liaw, Jhon-Jhy. (1998). Method for reducing the resistance of self-aligned contacts, for triple (U.S. Patent No. 5795827). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5795827
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile