The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 1998
Filed:
Sep. 12, 1997
Shing-Long Lee, Shin-Chu, TW;
Yeong-Rong Chang, Shin-Chu, TW;
Weng Liang Fang, Hsin-Chu, TW;
Cheng-Hao Huang, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for avoiding oxide peeling by removing polymer contaminants from the edge of a wafer is described. An interlevel dielectric sandwich layer is formed by depositing a first oxide layer overlying semiconductor device structures in and on a semiconductor substrate, coating a spin-on-glass layer overlying the first oxide layer and rinsing the spin-on-glass layer whereby an edge bead rinse hump is formed a first distance from the edge of the wafer, etching back the spin-on-glass layer wherein the wafer is held by a clamp a second distance from the edge of the wafer wherein the second distance is smaller than the first distance and wherein the etching back of the spin-on-glass layer forms the polymer on the surface of the first oxide layer under the clamp at a third distance between the first and second distances, and depositing a second oxide layer overlying the etched back spin-on-glass layer and the polymer at the edge of the wafer to complete the interlevel dielectric sandwich layer. A layer of photoresist is coated overlying the sandwich layer wherein the photoresist layer does not extend closer to the edge of the wafer than the third distance and patterned to form a photoresist mask. The interlevel dielectric sandwich layer is etched away where it is not covered by the mask to form via openings wherein the second oxide layer overlying the polymer is etched away. The photoresist mask is stripped whereby the polymer is also removed thereby avoiding oxide peeling at the edge of the wafer.