0.3 micron aperture width patterning process

Abstract

A method for forming a patterned layer within an integrated circuit. There is first provided a substrate having formed thereover a blanket target layer. There is then formed upon the blanket target layer a blanket focusing layer, where the blanket focusing layer is formed of an organic anti-reflective coating (ARC) material which is susceptible to a reproducible positive taper within a first etch method employed in forming from the blanket focusing layer a patterned focusing layer. The first etch method is a first plasma etch method employing an etchant gas composition comprising carbon tetrafluoride and argon. There is then formed upon the blanket focusing layer a blanket photoresist layer. The blanket photoresist layer is then photoexposed and developed layer to form a patterned photoresist layer. The blanket focusing layer is then etched through the first etch method to form the patterned focusing layer while employing the patterned photoresist layer as a first etch mask layer, where the patterned focusing layer has the reproducible positive taper with respect to the patterned photoresist layer and the blanket target layer. Finally, the blanket target layer is etched through a second etch method to form a patterned target layer while employing the patterned focusing layer as a second etch mask layer, where the patterned target layer has a reproducible second etch bias with respect to the patterned focusing layer, where the reproducible second etch bias does not substantially compensate the reproducible positive taper, and where the width of an aperture within the patterned target layer varies inversely as a function of the thickness of the patterned focusing layer.