The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 1997
Filed:
May. 25, 1995
Norman Godinho, Los Altos Hills, CA (US);
Tsu-Wei Frank Lee, Monte Sereno, CA (US);
Hsiang-Wen Chen, Cupertino, CA (US);
Richard F Motta, Los Altos, CA (US);
Juine-Kai Tsang, Palo Alto, CA (US);
Joseph Tzou, Belmont, CA (US);
Jai-Man Baik, San Jose, CA (US);
Ting-Pwu Yen, Fremont, CA (US);
Paradigm Technology, Inc., San Jose, CA (US);
Abstract
An MOS transistor for use in an integrated circuit is fabricated with a self-aligning contact and interconnect structure which allows for higher packing density. Self-aligning source and drain contacts overlap the gate but are prevented from a short circuiting to the gate by oxide insulation between the source/drain contacts and the gate, and a layer of silicon nitride above the gate. Contacts to the gate are made on top of the gate over the active region of the transistor because the source and drain regions are protected by a hardened layer of photoresist during etching of insulation to expose the gate contact. Source, drain and gate contacts are protected by a layer of titanium silicide so that interconnects are not required to completely cover these areas. Low resistance interconnects are formed of doped polysilicon covered by titanium silicide encapsulated by a thin film of titanium nitride.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile