The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 1996

Filed:

Jan. 20, 1995
Applicant:
Inventors:

Gregg M Gallatin, Newtown, CT (US);

Justin L Kreuzer, Trumbull, CT (US);

Michael L Nelson, W. Redding, CT (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01B / ;
U.S. Cl.
CPC ...
356363 ; 356349 ; 250548 ;
Abstract

The present invention provides a grating-grating interferometric wafer alignment system, sensor and method for microlithography. It includes: (1) an electromagnetic radiation source with collimating optics delivering a collimated beam of a coherent single or multiple discrete wavelengths or in some cases broadband electromagnetic radiation; (2) a detector of the intensity of the collimated return electromagnetic radiation; (3) x- and y-oriented independent linear gratings for the mask-mark; (3) a 'checkerboard pattern' grating for the wafer-mark; and (4) software including an algorithm for determining alignment from the return electromagnetic radiation intensity measured as a function of the relative position of the wafer and mask grating, and a means such as a Fourier transform determining phase and amplitude of a known frequency component of the intensity. In one embodiment a laser diode is used and the backscatter from the mask and wafer gratings is returned to the laser diode creating a beat signal used to determine alignment of the mask and wafer. Alignment accuracy is increased and made more tolerant of processing variables such as wafer topography and coatings.


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