The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 1996

Filed:

May. 25, 1994
Applicant:
Inventors:

Masahiro Miyata, Urayasu, JP;

Hirokazu Ezawa, Tokyo, JP;

Naoaki Ogure, Tokyo, JP;

Manabu Tsujimura, Yokohama, JP;

Takeyuki Ohdaira, Fujisawa, JP;

Hiroaki Inoue, Machida, JP;

Yukio Ikeda, Tokyo, JP;

Assignees:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Ebara Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257762 ; 257763 ; 257764 ; 257768 ;
Abstract

In a semiconductor device and a method for manufacturing the same according to the present invention, for example, an insulating film is deposited on a silicon substrate, and a concave groove is formed in the insulating film in accordance with a predetermined wiring pattern. Titanium and palladium are deposited in sequence on the insulating film to form a titanium film and a palladium film, respectively. A silver film is formed on the palladium film by electroplating, and a groove-shaped silver wiring layer is formed by polishing. The resultant structure is annealed at a temperature of about 700.degree. C., and an intermetallic compound is formed by alloying the titanium film and palladium film with each other. Consequently, a burying type wiring layer whose resistance is lower than that of aluminum, is constituted by the silver wiring layer and intermetallic compound.


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