Electrically erasable and programmable non-volatile memory device and a

Abstract

In a programming mode of operation of a flash type non-volatile semiconductor memory device, an erase voltage pulse is applied a memory cell to bring the memory cell into an erased state. Then, an after-erase writing operation is executed for a memory cell having a threshold voltage lower than a predetermined threshold voltage under the condition of small change in threshold voltage. Alternatively, an erase voltage pulse is applied only to a memory cell having a threshold voltage greater than a predetermined threshold voltage to carry out erasing. Also, after a memory cell is brought to a depletion state by application of an erase voltage pulse, data writing of '0' and '1' is carried out by injection of electrons into the floating gate. The electron injection rate to the floating gate for writing data '0' is set to be greater than that for writing data '1'. The state of storing data '1' corresponds to an erase state. According to this scheme, an excessively erased memory cell does not exist and the distribution range of threshold voltage can be reduced. Furthermore, the reprogramming time period for a memory cell data can be carried out in a short time.