The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 1989

Filed:

Sep. 06, 1988
Applicant:
Inventors:

Takeshi Sato, Nagano, JP;

Katsuya Fukase, Nagano, JP;

Kiyotaka Shimada, Nagano, JP;

Hirofumi Uchida, Nagano, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23F / ; B44C / ; C03C / ; C03C / ;
U.S. Cl.
CPC ...
156630 ; 29848 ; 156634 ; 156656 ; 1566591 ; 156902 ; 204 30 ; 204 351 ; 204 20 ; 2642711 ; 427 98 ;
Abstract

A process for forming a circuit substrate comprising placing an electrodeposited metal foil having a rough surface provided with a large number of fine projections in a cavity of a mold in such a manner that the rough surface faces an inside of the mold cavity; pouring a melting resin into the mold cavity to form a molded article; peeling the metal foil from the molded article to form a large number of fine concavities corresponding to the projections; electroless-plating the resin base to form a metal film; and photoetching to form a circuit pattern on the resin base.


Find Patent Forward Citations

Sato, Takeshi. (1989). Process for forming a circuit substrate (U.S. Patent No. 4867839). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4867839

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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