The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Sep. 30, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Alison V. Davis, Portland, OR (US);

Bern Youngblood, Hillsboro, OR (US);

Reza Bayati, Portland, OR (US);

Swapnadip Ghosh, Hillsboro, OR (US);

Matthew J. Prince, Portland, OR (US);

Jeffrey Miles Tan, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/762 (2006.01); H01L 23/522 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 84/83 (2025.01); H10W 10/00 (2026.01); H10W 10/17 (2026.01); H10W 20/42 (2026.01);
U.S. Cl.
CPC ...
H10D 84/83 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10W 10/0143 (2026.01); H10W 10/17 (2026.01); H10W 20/42 (2026.01);
Abstract

Techniques are provided herein to form semiconductor devices that include gate cuts with different widths (e.g., at least a 1.5× difference in width) but substantially the same height (e.g., less than 5 nm difference in height). A given gate structure extending over one or more semiconductor regions may be interrupted with any number of gate cuts that each extend through an entire thickness of the gate structure. According to some embodiments, gate cuts of a similar first width are formed via a first etching process while gate cuts of a similar second width that is greater than the first width are formed via a second etching process that is different from the first etching process. Using different etch processes for gate cuts of different widths maintains a similar height for the gate cuts of different widths.


Find Patent Forward Citations

Quick Actions:

Davis, Alison. (2026). Forming metal gate cuts using multiple passes for depth control (U.S. Patent No. 12772547). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12772547

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