The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2026

Filed:

Jun. 18, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Changhua Liu, Chandler, AZ (US);

Leonel R. Arana, Phoenix, AZ (US);

Jeremy D. Ecton, Gilbert, AZ (US);

Suddhasattwa Nad, Chandler, AZ (US);

Brandon Christian Marin, Gilbert, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 20/00 (2026.01); G03F 7/00 (2006.01); G03F 7/16 (2006.01); H10P 76/20 (2026.01); H10W 20/40 (2026.01); H10W 20/41 (2026.01); H10W 20/44 (2026.01);
U.S. Cl.
CPC ...
H10W 20/089 (2026.01); G03F 7/0035 (2013.01); G03F 7/162 (2013.01); H10P 76/2041 (2026.01); H10W 20/042 (2026.01); H10W 20/056 (2026.01); H10W 20/435 (2026.01); H10W 20/4421 (2026.01); H10W 20/496 (2026.01); H10W 20/497 (2026.01);
Abstract

Techniques for low- or zero-misaligned vias are disclosed. In one embodiment, a high-photosensitivity and low-photosensitivity photoresist are applied to a substrate and exposed at the same time with use of a dual-tone mask. After being developed, one photoresist forms an overhang over a sheltered region. The mold formed by the photoresists is filled with copper and then etched. The overhang prevents the top of the copper infill below the overhang region from being etched. As such, the sheltered region forms a pillar or column after etching, which can be used as a via. Other embodiments are disclosed.


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